![]() ![]() ![]() In October 2002 RISC OS 5 was released using only the 32-bit mode, required because 26-bit mode processors were no longer available – the last being the StrongARM used in the RiscPC. History, RISC OS 5 and software compatibilityĮarly ARM processors had a combined 26-bit program counter and status register, rather than separate 32-bit program counter and status registers.įor a time processors had both 26-bit and 32-bit modes, with the former being phased out by ARM.
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